[00:00.000 --> 00:12.440] So, welcome Sebastian Holtzab, the stage is yours. [00:12.440 --> 00:15.920] Okay, thank you. [00:15.920 --> 00:24.740] Hi everybody, my name is Sebastian, I'm an embedded systems engineer, usually in kind [00:24.740 --> 00:30.560] of the automotive, functional safety, autonomous vehicle space, but today I want to talk about [00:30.560 --> 00:34.840] one of my side projects that's completely unrelated to what I do at work, and I hope [00:34.840 --> 00:42.880] you guys enjoy it, so just kind of, because I'm curious, who actually knows what Eurorack [00:42.880 --> 00:43.880] is? [00:43.880 --> 00:48.640] Oh, that's amazing, okay, I wasn't really sure what to expect, okay, that makes me really [00:48.640 --> 00:49.640] happy. [00:49.640 --> 00:53.280] Who actually has a Eurorack system at home, and plays with it? [00:53.280 --> 00:58.920] Oh, okay, four or five, okay, actually after this talk, if you have a Eurorack system and [00:58.920 --> 01:03.120] you like playing with FPGAs, I have a couple of these boards, so please talk to me, I'm [01:03.120 --> 01:06.920] willing to give them away if you have cool ideas, but we can get back to that at the [01:06.920 --> 01:07.920] end. [01:07.920 --> 01:14.520] So, basically, Eurorack is a modular system for building your own kind of hardware electronic [01:14.520 --> 01:19.560] music synthesizers, and it was kind of created in the 90s and standardised by Dopefar, it's [01:19.560 --> 01:24.600] a little bit of a rough standard because it's a little bit rough around the edges and imprecise, [01:24.600 --> 01:31.560] but basically what the Eurorack standard is, is it's a description for what the dimensions [01:31.560 --> 01:35.760] of these modules should look like, and kind of roughly what the signals look like that [01:35.760 --> 01:40.160] flow between these modules, and so there are a whole bunch of different manufacturers, [01:40.160 --> 01:44.080] thousands of manufacturers, tens of thousands of different modules that you can buy from [01:44.080 --> 01:48.400] all sorts of boutiques, small and big manufacturers, and you can kind of buy these things, put [01:48.400 --> 01:53.560] them together into a system like this, and then use this to create music, that's kind [01:53.560 --> 01:56.200] of what Eurorack system is. [01:56.200 --> 02:02.040] And just to give you a small idea of what a typical module looks like, here is kind [02:02.040 --> 02:08.720] of the input and output jacks on a mutable instruments module, it's basically an oscillator [02:08.720 --> 02:14.320] module, and you can see there is an output jack where basically audio frequency signals [02:14.320 --> 02:19.440] come out of the oscillator, and then you can kind of change the properties of these signals [02:19.440 --> 02:26.520] by plugging in different kinds of input signals, that for example the V-Oct input jack that [02:26.520 --> 02:29.880] actually changes the pitch of the output signal, so you can choose which note the oscillator [02:29.880 --> 02:34.800] is playing, if you want to change the volume of the oscillator then you would send signals [02:34.800 --> 02:40.120] into the level input for example, but that's kind of what the input and output jacks on [02:40.120 --> 02:43.120] one of these individual modules actually looks like. [02:43.120 --> 02:45.200] But where did this project actually come from? [02:45.200 --> 02:51.520] So I had a crazy idea for a weird high performance granular sampling device that I wanted to [02:51.520 --> 02:59.720] make using FPGAs, and I didn't really know where to start in terms of okay, you can buy [02:59.720 --> 03:05.800] an FPGA development platform, you can buy development boards for audio codec ICs, you [03:05.800 --> 03:09.320] can put it together but then you need to do some conditioning on the signal to make it [03:09.320 --> 03:14.440] work with Eurorack, and potentially you also need to calibrate it as well, and I couldn't [03:14.440 --> 03:18.680] find examples for this kind of thing, so that's why I started playing in this world, because [03:18.680 --> 03:24.920] I couldn't find anything that really combined the hardware synthesizer world of Eurorack, [03:24.920 --> 03:30.480] and this PMOD interface, and PMOD is basically, I think it was something that was originally [03:30.480 --> 03:36.200] standardized by Digiland, and there's a whole bunch of FPGA development boards that you [03:36.200 --> 03:42.360] can buy that have this interface, so basically if you have the Eurorack PMOD hardware that [03:42.360 --> 03:47.280] you can see above there, you can plug it into an FPGA development board, you can synthesize [03:47.280 --> 03:52.840] one of the example designs, you can use that in your Eurorack system and start making weird [03:52.840 --> 03:53.840] music. [03:53.840 --> 04:00.160] So this project is a hardware design, so this board designing QICAD that you can find in [04:00.160 --> 04:06.120] the GitHub repository, it's a bunch of system very log that implements kind of drivers for [04:06.120 --> 04:14.080] the codec and the calibration, online calibration, some example DSP cores, and a bunch of simulation [04:14.080 --> 04:19.440] infrastructure, that's not just test benches for the FPGA gateway, but also allows you [04:19.440 --> 04:24.040] to simulate an entire modular system on your machine with like this little bit of FPGA [04:24.040 --> 04:28.360] code that you wrote for your module, and I'll show you what that looks like in a bit. [04:28.360 --> 04:34.760] So just to give you a look at what this looks like, so the Icebreak is a fantastic FPGA [04:34.760 --> 04:38.680] development board that I highly recommend, supports all the open source tool chains, [04:38.680 --> 04:43.760] you can purchase it from one bit squared, and this is what it looks like plugged into [04:43.760 --> 04:47.040] the hardware here, I wouldn't necessarily recommend that you plug it in this way because [04:47.040 --> 04:51.400] most Eurorack cases won't actually fit something this deep, so I would actually recommend that [04:51.400 --> 04:56.200] you use a ribbon cable to connect the FPGA board to your, to this kind of expansion module [04:56.200 --> 05:01.280] here, but it doesn't have to be this development board, it could be a different one. [05:01.280 --> 05:06.760] Just to give you an idea, the Icebreaker I think right now is 70 or 80 U.S. dollars, [05:06.760 --> 05:14.680] I think, or so, and what I actually wanted to show was a demo video, but I don't have [05:14.680 --> 05:20.600] any audio, so if you're curious to see this thing in action, then I encourage you to go [05:20.600 --> 05:26.200] to the GitHub repository for these slides, and in the GitHub repository are two movie [05:26.200 --> 05:30.800] files, maybe go and look at these after the talk, that includes like a video example of [05:30.800 --> 05:35.840] a couple of example calls running and what audio sounds like. [05:35.840 --> 05:39.200] So yeah, just leave that there for a second. [05:39.200 --> 05:44.080] So why might you want to play with Eurorack P-Mode? [05:44.080 --> 05:52.360] Well, maybe you want to start playing with DSP, maybe you want to try doing things that [05:52.360 --> 05:55.720] are difficult on an MCU-based platform, and what do I mean by that? [05:55.720 --> 06:01.840] So, if you want to do super low latency operations on a microcontroller-based platform, and there [06:01.840 --> 06:07.240] are a few microcontroller-based development platforms for Eurorack, very quickly if you [06:07.240 --> 06:11.320] want very low latency, you have to start dealing with DMA, you have to start dealing [06:11.320 --> 06:19.040] with some pretty sophisticated real-time operating system concepts, for example, and actually [06:19.040 --> 06:22.160] there are quite a few things that are easier to do in the FPGA world, especially when it [06:22.160 --> 06:27.520] comes to DSP than in the MCU-based world, but even if that wasn't the case, it's still [06:27.520 --> 06:32.440] kind of cool in my opinion to, it's a cool learning platform to play with FPGAs. [06:32.440 --> 06:38.280] If you have kind of this world where you can just play with sound, plug arbitrary things [06:38.280 --> 06:42.400] in, make a module that implements a tiny little piece of functionality and see how it is affected [06:42.400 --> 06:46.160] by all different effect modules and different oscillators they have in your system and it [06:46.160 --> 06:49.680] makes it very easy to discover things. [06:49.680 --> 06:59.000] So in the GitHub repository for this project, you can find a whole bunch of examples for [06:59.000 --> 07:03.960] different DSP cores, and you can load these onto your FPGA development platform, you can [07:03.960 --> 07:08.360] try them out and see how they sound, and that's just to give you a picture, there's going [07:08.360 --> 07:14.120] to be more coming, but just to give you a very simple example of what one of these cores [07:14.120 --> 07:17.800] looks like, and to be clear, this is just the DSP core, there's a whole bunch of driver [07:17.800 --> 07:22.400] cores that you don't see that you don't have to worry about if you're making a design [07:22.400 --> 07:24.280] like this. [07:24.280 --> 07:29.120] This is Verilog, and this is implementing something called a voltage control amplifier, [07:29.120 --> 07:30.120] what does that mean? [07:30.120 --> 07:35.320] We're just multiplying one channel by another channel and sending that to an output channel. [07:35.320 --> 07:40.880] That's basically what a voltage control amplifier is, and in Verilog that looks like this. [07:40.880 --> 07:50.160] We take basically the output is input 0 multiplied by input 1, we have to shift it otherwise, [07:50.160 --> 07:55.800] because basically in this case it's a 16-bit sample, then we have a 32-bit result, this [07:55.800 --> 08:00.560] is to convert it back into a 16-bit sample so that we can send it to the output, but [08:00.560 --> 08:01.560] why is this cool? [08:01.560 --> 08:07.960] This is very simple, but what's cool is with this very, very simple piece of code in Verilog, [08:07.960 --> 08:14.640] you achieve something that is ridiculously low latency, so here we're achieving just [08:14.640 --> 08:20.800] with that example, like basically 120 microseconds of latency, if you're sampling at 192 kHz that's [08:20.800 --> 08:24.720] 24 samples of latency from the input to the output, just with this small bit of code. [08:24.720 --> 08:33.880] If you are going to try and do that on a microcontroller, not easy, you can do it, but it's not easy. [08:33.880 --> 08:37.600] In this case, I actually think that the latency on an FPGA-based system should have been a [08:37.600 --> 08:42.680] bit lower, but what's actually going on here, why are we getting 24 samples of latency from [08:42.680 --> 08:46.320] the input to the output with a simple implementation like this? [08:46.320 --> 08:52.000] It's because the audio codec on this piece of hardware itself has a bunch of internal [08:52.000 --> 08:57.640] filters that kind of pipeline the input, it uses this for like, I think some kind of pre-emphasis [08:57.640 --> 09:02.600] function or something that you can partially disable but not entirely disable, but that's [09:02.600 --> 09:04.160] kind of where this is coming from. [09:04.160 --> 09:11.160] In this plot up here, you can see, kind of in red, a signal coming into both the URAC [09:11.160 --> 09:17.920] PMOD and another MCU-based module, the DISTing, and then the yellow trace is what's coming [09:17.920 --> 09:21.200] out of the URAC PMOD and then the blue trace is what's coming out of the microcontroller-based [09:21.200 --> 09:24.880] module, so you can kind of see the difference in latency there, and both of them are both [09:24.880 --> 09:30.640] acting as the same thing in this case. [09:30.640 --> 09:35.680] So the hardware, I went through a few different revisions, I made some mistakes in revision [09:35.680 --> 09:43.080] one and two, as you can see here by the Bodge wires, but as of right now, if you were to [09:43.080 --> 09:49.200] go ahead and download the Kaikai design files for revision 2.2, which is this one on the [09:49.200 --> 09:53.800] right here, which I have in front of me here, it works without any modification, so you [09:53.800 --> 09:56.680] can just build it. [09:56.680 --> 10:02.000] But there is a revision 3 coming and I'll talk about that in a second. [10:02.000 --> 10:06.200] So what does this hardware design actually look like? [10:06.200 --> 10:10.040] Basically there are eight channels, we have four input channels, four output channels, [10:10.040 --> 10:15.080] a bunch of LED indicators so you can see what's going on, but then the heart of this whole [10:15.080 --> 10:23.440] system is the audio codec, and what's interesting about this audio codec is it's a chip that's [10:23.440 --> 10:28.640] kind of intended for the automotive industry, and some other Eurorack modules for this kind [10:28.640 --> 10:34.320] of purpose will not use kind of a normal audio codec, they'll use instrumentation amplifiers [10:34.320 --> 10:42.480] or some other type of ADC or DAC, and the reason for that is because in Eurorack we're [10:42.480 --> 10:48.440] not just dealing with audio frequency AC coupled signals, in Eurorack we're also dealing with [10:48.440 --> 10:55.240] sometimes extremely fast DC signals that need to be accurate, for example if you are controlling [10:55.240 --> 11:00.680] an oscillator and you need to control the pitch very precisely, the absolute DC accuracy [11:00.680 --> 11:05.560] is important because if you shift by a few millivolts then suddenly your song is not [11:05.560 --> 11:10.880] in tune anymore, and that's why DC accuracy is important, and basically audio codec IC [11:10.880 --> 11:17.040] is often not designed for DC accuracy, but the benefit of an audio codec IC is that it's [11:17.040 --> 11:22.520] cheap, so you might pay three or four euros per unit instead of, I don't know for instrumentation [11:22.520 --> 11:32.560] quality converter you're paying tens of euros perhaps, but the cool thing is, the main difference [11:32.560 --> 11:38.240] here and at least in the case of this codec that I was playing with in this hardware, [11:38.240 --> 11:43.960] there is kind of a fixed DC bias in the codec input and output when you get it from the [11:43.960 --> 11:49.600] factory and you can calibrate this out just using a simple, like you can basically calibrate [11:49.600 --> 11:55.160] it out using a simple linear regression, kind of feed five volts into the codec, measure [11:55.160 --> 12:00.200] what it gives you, send minus five volts in, measure what it gives you, do that for the [12:00.200 --> 12:06.160] inputs as well as the outputs, and then on the FPGA itself account for this DC bias that's [12:06.160 --> 12:10.720] present in the codec after it's manufactured, and after doing it going through this calibration [12:10.720 --> 12:15.120] process, and there are scripts to do this calibration in the GitHub repository, you [12:15.120 --> 12:20.600] can actually achieve kind of sub five millivolt level, absolute DC accuracy between minus [12:20.600 --> 12:26.760] ten and ten volts using an audio codec chip, which is awesome because it brings manufacturing [12:26.760 --> 12:31.920] cost down if you decide to kind of create your own FPGA based instrument and it means [12:31.920 --> 12:36.520] that this thing doesn't cost so much, and it also means you can use I2S which is kind [12:36.520 --> 12:41.760] of a standard-dish audio interface protocol, embedded audio interface protocol instead [12:41.760 --> 12:50.120] of some other interface protocol, so basically the datasheet strongly, it does not suggest [12:50.120 --> 12:59.560] that you do this, but if you do it, it works really well, so like explicitly ignoring what [12:59.560 --> 13:03.040] it says to do in the recommended external circuits, and I've tested the crap out of [13:03.040 --> 13:06.960] this, even over temperature and so on, it seems to work, and I mean fortunately we're [13:06.960 --> 13:12.400] not dealing with automotive and functional safety, so no one's going to complain if we [13:12.400 --> 13:17.640] don't do things the way the datasheet suggests that we do them. [13:17.640 --> 13:23.200] So this is kind of just a simplified overview of what the FPGA gateway looks like for the [13:23.200 --> 13:30.840] example project here, and basically the part that you write yourself is this user-defined [13:30.840 --> 13:40.480] DSP core, and then between that and the rest of the world is a driver for the codec IC, [13:40.480 --> 13:46.560] a driver for the I2C interface that initializes the codec IC, a calibration routine that basically [13:46.560 --> 13:52.680] does this online calibration of the codec that I was mentioning before, and yeah, I [13:52.680 --> 13:54.640] mean that's what it looks like. [13:54.640 --> 13:59.400] So that's kind of the hardware, and I also described a bit about how the gateway works, [13:59.400 --> 14:05.040] but if you have no hardware at all, you can still play with this stuff, because I actually [14:05.040 --> 14:11.600] wrote a plug-in for a BCV rack, which is an open source simulator for modular synthesis [14:11.600 --> 14:20.200] system, basically, Eurorack, and what this plug-in does is it actually simulates with [14:20.200 --> 14:27.640] varilator, like here I can show you, oh, got one minute, okay, so here's a varilog implementation [14:27.640 --> 14:34.240] of a clock divider, and this is sitting inside a plug-in for BCV rack, and it's compiled [14:34.240 --> 14:40.280] with varilator to C++ so that you can run it inside an entire modular synthesis system [14:40.280 --> 14:48.760] simulation, and so now we have basically this simulation of the hardware with the varilog [14:48.760 --> 14:54.080] that would be running on your FPGA, actually running through varilator in translated C++ [14:54.080 --> 14:58.880] linked to the BCV rack binary so that you can actually run your FPGA code inside a modular [14:58.880 --> 15:10.280] synthesis system, which is kind of crazy, and it makes me happy that you clapped then, [15:10.280 --> 15:14.360] but that was actually the easiest thing to do out of everything that I described before, [15:14.360 --> 15:18.440] like literally that was about four hours of work, I was surprised that it was so easy, [15:18.440 --> 15:26.320] but I encourage you to play with this stuff if you're interested in it, so, oh, okay, [15:26.320 --> 15:37.240] that's time for me, I was almost done, thank you for listening, so two things I would like [15:37.240 --> 15:42.680] to note, I am thinking of going through with a manufacturing run for the revision three [15:42.680 --> 15:47.280] of these boards, so if you are interested in the hardware here, if this is your niche, [15:47.280 --> 15:51.280] start a GitHub repository so I know how many people will be interested, that's my only [15:51.280 --> 15:54.680] request, because if I manufacture a hundred of these things and they just hang around [15:54.680 --> 16:22.200] in my apartment, then I won't know what to do with them, so thank you. Thank you.